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Old Nov 26, 2007, 11:46 AM   #1 (permalink)
mike2h
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Rambus proposes Terabyte per second memory initiative
TG Daily


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Los Altos (CA) - Rambus will announce on Wednesday a new Terabyte Bandwidth Initiative (TBI) designed to bring terabyte bandwidth to future many-core architectures. The design places 16 DRAM channels, each operating at 16 Gbps with 4 bytes of data per clock. In theory, the total aggregate memory throughput would be 1,024 Gigabytes (1 Terabyte) available via sixteen separate channels, each of which could be piped directly to a group of multiple cores
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Old Nov 26, 2007, 11:48 AM   #2 (permalink)
mike2h
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sorry, you already got it. lol.
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